Moire effects occur in displays due to interference between images and are particularly noticeable in pixelated image displays such as conventional cathode ray tube (CRT) displays. Moire cancellation is a key feature of high-end display monitors (e.g., for computer CRT displays having a diagonal screen size of 17" and above).
For such high-end monitors, auto speed tracking and programmable delay time for Moire cancellation is becoming a demand because of the increasing number of video resolution modes which causes CRT speed to vary in a wide range.
Moire cancellation is typically implemented in an analogue circuit in the time base integrated circuit (IC) of a display system, and it is known for such analogue Moire cancellation circuitry to incorporate auto speed tracking and programmable delay time.
Moire cancellation can alternatively be implemented in a simple digital circuit outside the time base IC if the IC does not provide such a feature, but the analogue techniques for auto speed tracking and programmable delay time would be very difficult to implement in such digital circuitry since the technologies of the analogue and digital circuits are so dissimilar. In conventional digital approaches, Moire cancellation is typically implemented with a fixed delay time.
It is an object of the present invention to provide a Moire cancellation circuit which uses a digital approach, which can be incorporated in a digital Time Base integrated circuit, and which can provide auto speed tracking and programmable delay time.
It is an object of this invention to provide a Moire cancellation circuit which uses a digital approach, which can be incorporated in a digital Time Base integrated circuit, and in which the above disadvantages may be overcome or at least alleviated.